In recent years, as electronic devices have become finer and had higher performance, a semiconductor wafer of higher quality such as a silicon single crystal wafer or an epitaxial wafer or an SOI (Silicon On Insulator) wafer has been desired. An SOI wafer is a wafer having an SOI structure comprising, a support wafer, a buried oxide film (BOX layer) formed thereon, and an SOI layer (silicon-active layer) formed thereon. Because an electronic device is formed on a front surface side of each of these wafers, evaluation of quality has been actively performed with respect to, a surface layer of a silicon single crystal wafer or an epitaxial wafer, or an SOI layer of an SOI wafer. As one technique for the evaluation of quality, it has been performed that a MOS (Metal Oxide Semiconductor) structure is formed on the surface layer of a silicon single crystal wafer or an epitaxial wafer or on the surface of the SOI layer, and then the quality of the surface layer of the silicon single crystal wafer or the epitaxial wafer or the SOI layer is evaluated by applying voltage to an electrode portion thereof.
In order to form such a MOS structure on a surface layer of a silicon single crystal wafer or an epitaxial wafer, a silicon oxide film is formed on a main surface of each of the wafers, and a polysilicon layer is further grown thereon. And, by using a photolithography technique, the polysilicon layer is formed into a polysilicon electrode having a desired size. On the other hand, in the case of an SOI wafer, after forming an oxide film and a polysilicon layer, a polysilicon electrode is formed by using a photolithography technique, in the same manner. However, processing for earth connection from a surface thereof is required.
However, in order to form a MOS structure on a semiconductor wafer as described above, particularly in the case of an SOI wafer, a gate electrode and earth connection have to be formed on the main surface side thereof, and therefore, a large-scale apparatus and multiple steps such as a photolithography process are required and there are troubles such as large burden to cost and lack of rapidity.
Accordingly, there have been developed evaluation methods for evaluating a wafer more simply by using a mercury probe without forming a MOS structure on a semiconductor wafer by multiple steps as a conventional method. As one of the methods, a Pseudo MOS FET method in which an object to be evaluated is an SOI wafer has been proposed (see, for example, Japanese Patent Application Laid-open (kokai) No. 2001-60676, Japanese Patent Application Laid-open (kokai) No. 2001-267384, and S. Cristoleveanu et al., “A Review of the Pseudo-MOS Transistor in SOI Wafers: Operation, Parameter Extraction, and Applications” IEEE Trans. Electron Dev., 47 1018 (2000), H. J. Hovel, “Si film electrical characterization in SOI substrates by HgFET technique” Solid-State Electronics, 47, 1311 (2003)).
Hereinafter, the Pseudo MOS FET method will be explained by using an SOI wafer as an object wafer to be evaluated.
First, as shown in FIG. 11, on the side of an SOI layer 1 of an SOI wafer 8 to form a pseudo-MOS structure in, as electrodes for evaluation, needle probes or mercury probes are directly contacted, and they are set to be a drain electrode 6 and a source electrode 7. A back surface of the SOI wafer 8, namely, a back surface of a support wafer 3 is vacuum-sucked on a stage that is also used as an electrode or the wafer back surface is contacted with a needle, and thereby a gate electrode 4 is formed. Various electric characteristics can be obtained by applying voltage between these electrodes through a gate-voltage applying terminal 5 or the like. In this case, by cleaning the SOI wafer 8 with an aqueous solution containing hydrogen fluoride before the evaluation, a native oxide film formed on the surface of the SOI layer 1 can be removed, and therefore, by excluding effect of the native oxide film, it becomes possible to obtain more accurate electric characteristics.
In the evaluation method, it is preferable that mercury probes are used because a probe contact hole to be generated in contacting a needle probe on the surface of the SOI layer 1 is not formed and therefore, repeat measurements and a measurement in the vicinity of a first measured point can be performed easily.
In the case of the SOI wafer of P type, by performing the measurement with applying a gate voltage in the positive side, an electron mobility of the SOI layer 1 and an interface state density in the interface between the SOI layer 1 and the BOX layer 2 can be obtained. On the other hand, by performing the measurement with applying a gate voltage in the negative side, a hole mobility of the SOI layer 1 and a charge density of the BOX layer 2 can be obtained. In the case of performing the measurement with applying a gate voltage in the negative side, in order to accurately perform the measurement, it is necessary that, 10 hr or more passes after a native oxide film on the SOI layer surface is removed by cleaning the SOI wafer 8 with an aqueous solution containing hydrogen fluoride, and thereby an electric state of the SOI layer surface becomes stable, and then the measurement is performed.
Moreover, a mercury electrode of the mercury probe adsorbs contamination such as particles or metal impurities or organic impurities on the SOI layer in the evaluation, and therefore occasionally, the mercury constituting the electrode is gradually contaminated with containing impurities. If the mercury electrode is contaminated, an electric characteristic cannot be accurately evaluated, and therefore, it is necessary that the mercury electrode is subjected to cleaning of the mercury in getting to a predetermined frequency of use or a predetermined contamination frequency.